Cryptography

SPHINCSLET: An Area-Efficient Accelerator for the Full SPHINCS+ Digital Signature Algorithm
Sanjay Deshpande, Yongseok Lee, Cansu Karakuzu, Jakub Szefer, Yunheung Paek
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SDitH in Hardware
Sep 6, 2024 IACR TCHES 2024
Sanjay Deshpande
SDitH in Hardware
May 25, 2024 CBCrypto 2024
Sanjay Deshpande
Performance Analysis of Parameterizable HQC Hardware Architecture
May 9, 2024 CBCrypto 2026
Sanjay Deshpande
SDitH in Hardware
Apr 12, 2024 Fifth NIST PQC Standardization Conference
Sanjay Deshpande
SDitH in Hardware
Sanjay Deshpande, James Howe, Jakub Szefer, Dongze Yue
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Fast and Efficient Hardware Implementation of HQC
Nov 1, 2023 Qualcomm
Sanjay Deshpande
Fast and Efficient Hardware Implementation of HQC
Aug 17, 2023 University of New Brunswick
Sanjay Deshpande
Fast and Efficient Hardware Implementation of HQC
Sanjay Deshpande, Chuanqi Xu, Mamuri Nawan, Kashif Nawaz, Jakub Szefer
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Fast and Efficient Hardware Implementation of HQC
Apr 22, 2023 CBCrypto 2023
Sanjay Deshpande