Cryptography

Hardware Realization and Implementation Security Evaluation of HQC
Apr 28, 2026 PQSecure Technologies
Sanjay Deshpande
Performance Analysis of Parameterizable HQC Hardware Architecture
Nishant Pandey, Sanjay Deshpande, Dixit Dutt Bohra, Debapriya Basu Roy, Dip Sankar Banerjee, Jakub Szefer
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Hardware Realization and Implementation Security Evaluation of HQC
Jan 29, 2026 Microsoft Research
Sanjay Deshpande
Video
Accelerating FrodoKEM in Hardware
Sanjay Deshpande, Patrick Longa, Jakub Szefer
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Hardware Realization and Implementation Security Evaluation of HQC, A NIST Standard
Nov 20, 2025 Academia Sinica
Sanjay Deshpande
Hardware Realization and Implementation Security Evaluation of HQC, A NIST PQC Standard
Oct 23, 2025 New York University
Sanjay Deshpande
SPHINCSLET - An Area-Efficient Accelerator for the Full SPHINCS+ Digital Signature Algorithm
Sep 25, 2025 Sixth NIST PQC Standardization Conference
Sanjay Deshpande
Hardware Implementation Efficiency and Security Evaluation of HQC - A NIST PQC Standard
Aug 13, 2025 Indian Institute of Technology
Sanjay Deshpande
Unified MEDS Accelerator
Sanjay Deshpande, Yongseok Lee, Mamuri Nawan, Kashif Nawaz, Ruben Niederhagen, Yunheung Paek, Jakub Szefer
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Unified MEDS Accelerator
Hardware Implementation Efficiency and Security Evaluation of HQC - A NIST PQC Standard
May 14, 2025 Northwestern University
Sanjay Deshpande