Cryptography

Implementing PQC in Hardware
A deep dive into hardware implementation of post-quantum cryptography and why it matters, using Hamming Quasi-Cyclic (HQC), one of …
Jul 16, 2026 AUB Mediterraneo
Sanjay Deshpande
Slides
Storing Less in-the-Head: An Area-Efficient Hardware Architecture for SDitH-v2
Stef Halmans, Niklas Höher, Dina Hesse, Sanjay Deshpande, Jakub Szefer, Tim Güneysu
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Correlation Power Analysis of Hamming-Quasi Cyclic
Huizhen Zhou, Luke Beckwith, Sanjay Deshpande, Xiaokuan Zhang, Kris Gaj, Jakub Szefer
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Hardware Realization and Implementation Security Evaluation of HQC
Apr 28, 2026 PQSecure Technologies
Sanjay Deshpande
Performance Analysis of Parameterizable HQC Hardware Architecture
Nishant Pandey, Sanjay Deshpande, Dixit Dutt Bohra, Debapriya Basu Roy, Dip Sankar Banerjee, Jakub Szefer
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Hardware Realization and Implementation Security Evaluation of HQC
Jan 29, 2026 Microsoft Research
Sanjay Deshpande
Video
Accelerating FrodoKEM in Hardware
Sanjay Deshpande, Patrick Longa, Jakub Szefer
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Hardware Realization and Implementation Security Evaluation of HQC, A NIST Standard
Nov 20, 2025 Academia Sinica
Sanjay Deshpande
Hardware Realization and Implementation Security Evaluation of HQC, A NIST PQC Standard
Oct 23, 2025 New York University
Sanjay Deshpande
SPHINCSLET - An Area-Efficient Accelerator for the Full SPHINCS+ Digital Signature Algorithm
Sep 25, 2025 Sixth NIST PQC Standardization Conference
Sanjay Deshpande